This article teaches the best way to set up your first FPGA Device on your computer. Start utilizing the Intel® Quartus® program for FPGA programming with this easy exercise. To get FPGA to flash any of the 8 green customer LEDs on board, you must first generate a Verilog code, assign pins, and impose time restrictions. An LED will be connected to one of the counter’s output bits as you drive it with a 50 MHz clock input (provided by an onboard oscillator).
Terasic DE10-Nano Hardware Kit is Used
For makers, IoT developers, and educators, Terasic DE10-Nano control board. It is based on an Intel® Cyclone V SoC FPGA, which offers a programmable hardware design platform. The kit is available here.
Software Suite Lite Edition of Intel Quartus Prime
Because it can be downloaded for free and doesn’t require a licensing file, the FPGA software program utilized here is excellent for novices. The application can be downloaded. You can begin building a project as soon as Intel® Quartus® software has been downloaded and installed. There are the following steps to get the best way to set up your first FPGA Device on your computer.
Step 1: Create a software project using Intel® Quartus®
- Open the Lite Edition of the Intel Quartus Prime Software Suite
- Wizard to Create a New Project
- Choose Next
- The directory, Name, and Top-Level Entity should be chosen
- Select Yes when asked if you want to create the directory
Step 2: Create an HDL (Hardware Description Language)
The HDL we employ is Verilog. If you’re new to writing in an HDL but are familiar with C programming language, Verilog is similar to C in that each sentence must conclude with a semicolon.
- Open the main window’s File tab, then click New
- After choosing Verilog HDL File, click OK
- Select File and then Save As in the next step. Then press Save
Step 3: Make a Verilog Module
This Verilog code should be copied and pasted into the window. To run a syntax check and start synthesizing the Verilog code, right-click on Analysis and Synthesis and then select Start.
Step 4: Select Pin Assignments
Choose Assignments > Pin Planner from the top navigation bar.
Step 5: Create an SDC file
Timing limitations for the design must be provided before the Verilog code is compiled. To instruct Intel® Quartus® software on how to close timing on designs, you will produce an SDC file that contains commands.
Step 6: Compile Verilog code
Click Start after doing a click on Compile Design. The tools will next perform timing analysis, place and route, and assemble and synthesize the design. The compilation should be finished in a few minutes due to just a few lines of code.
Step 7: Activate FPGA
The FPGA must be programmed as the last step. Make careful to take the SD Card out of the board before we do that.
- Utilize the USB blaster port to connect the board to your computer
- Connect the board to power and check that there is blue light. Near the J13 USB Blaster II port, an LED lit up
- Right-click to open the Program Device
- Choosing Hardware Setup
- Select DE-SoC from the drop-down list for currently selected hardware, then click Close
- Hardware Selected
- To locate the JTAG chain on board, click Auto Detect
- Choose gadget 5CSEBA6. This is an FPGA gadget
- Change File can be chosen by right-clicking in the File column for the 5CSEBA6 device
- After selecting the Program/Configure column, click Start